Mrigank Sharad, Charles Augustine, Georgios Panagopoulos, Kaushik Roy
We present a design-scheme for ultra-low power neuromorphic hardware using emerging spin-devices. We propose device models for 'neuron', based on lateral spin valves that constitute of nano-magnets connected through metal-channels. Such magneto-metallic neurons can operate at ultra-low terminal voltage of ~20 mV, resulting in small computation energy. Use of domain wall magnets as programmable 'synapse' and as 'integrating-neurons' is proposed. Magnetic tunnel junctions are employed for interfacing the spin-neurons with charge-based devices like CMOS, for large-scale networks. Device-circuit co-simulation-framework is used for simulating such hybrid designs, in order to evaluate system-level performance. We present the design of different classes of neuromorphic architectures using the proposed scheme that can be suitable for different applications like, analog-data-sensing, data-conversion, cognitive-computing, associative memory, programmable-logic and analog and digital signal processing. We show that the spin-based neuromorphic designs can achieve 15X-300X lower computation energy for these applications, as compared to state of art CMOS designs.
View original:
http://arxiv.org/abs/1206.3227
No comments:
Post a Comment